Protection of device edges, where the region of the device makes the transition from its internal structure to its external structure, is an essential aspect of the design of high voltage semiconductor devices such as MOSFETs, IGBTs, MCTs, bipolar transistors, thyristors, and diodes. The edge protection, or edge passivation structure, must perform the function of distributing the applied voltage over a wider region on the surface of the device than it occupies within the silicon substrate, thereby ensuring that the electric field at the surface is low enough to prevent arcing outside the silicon substrate or avalanche breakdown within the substrate near its surface.
In producing a P-N junction diode by a typical planar diffusion technique, a cylindrical junction is formed by diff-using a dopant through an oxide window. Because of the curvature at the edge of the junction, it produces a greater electric field than an ideal planar junction. As a result, the breakdown voltage of a cylindrical junction diode is substantially lower than an ideal planar junction diode.
Junction termination extension (JTE) is an edge passivation technique for reducing the concentration of the electric field in a cylindrical junction diode. To support the applied voltage at the surface, a JTE region is characterized by a dopant charge per unit area sufficiently low to allow the field to spread all the way, or most of the way, through the region prior to the onset of avalanche breakdown. The optimum dopant density per unit area for such a region is of the order of 1.times.10.sup.12 to 1.times.10.sup.13 per square centimeter, which approximates the maximum charge per unit area that a JTE region can contain prior to the onset of avalanche breakdown. Too low a density will allow the region to deplete at a field too low to support adequate voltage; too high a density will cause the depletion region to be too thin to support adequate voltage. JTE is described in, for example, V. A. K. Temple, "Junction termination extension, a new technique for increasing avalanche breakdown voltage and controlling surface electric field in p-n junction," IEEE International Electron Devices Meeting Digest. 1977, Abstract 20.4, pp 423-426, the disclosure of which is incorporated herein by reference.
U.S. Pat. No. 5,712,502 to Mitlehner et al., the disclosure of which is incorporated herein by reference, describes a semiconductor device that includes an active area, a depletion zone whose vertical extension is at a maximum beneath the active area, and a junction termination whose lateral extension is greater than the maximum vertical extension of the depletion zone.
U.S. Pat. No. 4,927,772 to Arthur et al., the disclosure of which is incorporated herein by reference, describes a method of making a high voltage semiconductor device using two masks that enable the formation of a graded multiple-zone JTE region and a graded multiple zone P+ region.
U.S. Pat. No. 4,667,393 to Ferla et al., the disclosure of which is incorporated herein by reference, describes a method for making a high voltage semiconductor device having a stepped continuous JTE zone formed by implanting and diffusing decreasing concentrations of a dopant through a series of mask apertures prior to forming emitter and channel stop regions and metal emitter, base, and collector contacts.
U.S. Pat. No. 4,648,174 to Temple et al., the disclosure of which is incorporated herein by reference, describes a process of forming a semiconductor that includes a multiplezone junction termination region adjacent a reverse-blocking junction.
FIGS. 1, 2, and 3 schematically illustrate several known JTE structures. In FIG. 1, the dopant density in the JTE region is depicted as constant, and in FIG. 2 it is shown as decreasing in discrete steps with increasing distance from the active region. The JTE structure of FIG. 3 is similar to that of FIG. 2, except that the dopant density decreases in a smooth gradient. A stepped or graded density, as shown in FIGS. 2 and 3, is more tolerant of variations in dopant density than the constant-density situation of FIG. 1.
Finding an improved way to reduce the electric field at the active area-JTE junction of a power semiconductor device and thereby increase its breakdown volta e remains a highly desirable goal, one that is realized in the present invention.